SAA7113H

Product Summary

The SAA7113H is a 9-bit, video input processor. The SAA7113H is a combination of a two-channel analog preprocessing circuit including source selection, anti-aliasing filter and ADC, an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multi-standard decoder (PAL BGHI, PAL M, PAL N, combination PAL N, NTSC M, NTSC-Japan, NTSC N and SECAM), a brightness, contrast and saturation control circuit, a multi-standard VBI data slicer and a 27 MHz VBI data bypass. The applications of the SAA7113H include Notebook (low power consumption), PCMCIA card application, AGP based graphics cards, Image processing, Video phone applications, Intercast and PC teletext applications, Security applications.

Parametrics

SAA7113H absolute maximum ratings: (1)digital supply voltage:-0.5V to +4.6 V; (2)analog supply voltage:-0.5V to +4.6 V; (3)input voltage at analog inputs:-0.5V to VDDA + 0.5V(4.6 max); (4)output voltage at analog output:-0.5V to VDDA + 0.5 V; (5)input voltage at digital inputs and outputs:-0.5V to +5.5 V; (6)output voltage at digital outputs:-0.5V to VDDD+0.5V; (7)voltage difference between VSSA(all) and VSS(all):100 mV; (8)storage temperature:-65℃ to +150℃; (9)operating ambient temperature:0℃ to 70℃; (10)operating ambient temperature under bias:-10℃ to +80℃; (11)electrostatic discharge all pins:-2000V to +2000 V.

Features

SAA7113H features: (1)Requires only one crystal (24.576 MHz) for all standards; (2)Automatic detection of 50 and 60 Hz field frequency, and automatic switching between PAL and NTSC standards; (3)User programmable luminance peaking or aperture correction; (4)Cross-colour reduction for NTSC by chrominance comb filtering; (5)PAL delay line for correcting PAL phase errors; (6)Brightness Contrast Saturation (BCS) and hue control on-chip; (7)Real-time status information output (RTCO); (8)Two multi functional real-time output pins controlled by I2C-bus; (9)Two analog preprocessing channels in differential CMOS style for best S/N-performance; (10)Fully programmable static gain or automatic gain control for the selected CVBS or Y/C channel; (11)Switchable white peak control; (12)Two built-in analog anti-aliasing filters; (13)Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C-signals are available on the VPO-port via I2C-bus control; (14)On-chip clock generator; (15)Line-locked system clock frequencies; (16)Digital PLL for horizontal sync processing and clock generation, horizontal and vertical sync detection.

Diagrams